SX-SDPAC System-in-Package (SiP)

802.11a/b/g/n/ac SDIO System-in-Package (SiP)

The SX-SDPAC is a dual-band 1x1 802.11a/b/g/n/ac plus Bluetooth 5.0+HS “Smart Ready” SDIO SiP module specifically designed for low-cost high volume embedded applications.

Dual-Band SiP module

Silex SX-SDPAC is a dual-band 1x1 802.11a/b/g/n/ac plus Bluetooth 5.0+HS “Smart Ready” SDIO SiP module based on the Qualcomm Atheros QCA9377 System-on-Chip (SoC). It integrates a QCA9377 SoC and a single-ended integrated RF front end including a diplexer and coupler. These allow a single external antenna to be used for both 5GHz and 2.4GHz bands internally.

Silex SX-SDPAC is a dual-band 1x1 802.11a/b/g/n/ac plus Bluetooth 4.1+HS “Smart Ready” SDIO SiP, smallest footprint for space constrained devices. This module based on the Qualcomm Atheros QCA9377 System-on-Chip (SoC) for portable battery operated electronic devices.
  • Low Power Dual-Band 1x1 SiP Module
  • Based on the QCA9377 Chipset
  • 802.11 a/b/g/n/ac Wave 2 MU-MIMO
  • Standard and High-Speed BT
  • SDIO 3.0 WLAN Host Interface
  • UART/PCM BT Interface
  • On-chip Power Management Unit (PMU)
  • Single 3.3V Supply (I/O Supply 1.8V or 3.3V)
  • Single-ended Integrated RF Front-end Design
  • Pin Connections:  80 pins
  • Device Interfaces: SDIO v3.0, UART
  • RF Interface:  IEEE802.11a/b/g/n/ac,  IEEE802.11-2012/IEEE802.11ac-2013
  • Bluetooth 5.0 BR/EDR/LE Smart Ready
  • Dimensions:  6.9 x 6.9 x 1.082 mm
  • Operating Temp:  -20 ~ +70
  • Operating humidity: 85  %RH
  • Storage temp:  -40 ~ 135
  • Moisture Sensitivity Level :  3
Hardware Specifications
Using QDART/QCBR for Regulatory Testing (Linux 4.1.15-2.0.1_ga) (Application note)
Debugging the SX-SDxAC Driver (Application note)
SX-SDPAC BLueZ 5.37 for i.MX6 6SX SABRE-SDB (Application note)
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